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In a highly connected World, network security is a must even for embedded systems. However, cryptographic algorithms are computationally intensive and the processors used in FPGA-based embedded systems are known to have a modest performance. In fact, this paper presents a study showing that unless HW acceleration is used, the throughput of secure applications on FPGA-based embedded systems is poor when compared to the current networking standards. But the multi-algorithm nature of most applications poses many difficulties to classic HW acceleration, particularly large area utilization and difficulty in supporting new algorithms. Fortunately, these problems can be easily solved using partial run-time reconfiguration. This paper proposes an architecture based on self-reconfiguration that allows the implementation of hardware accelerated secure applications in FPGA-based embedded systems. Cryptographic coprocessors are efficiently deployed without incurring in the problems mentioned above, and moreover, without needing any external components. To prove the feasibility of this proposal, a proof-of-concept implementation of the well-known SSH application has been developed in a low-cost commercial device running a standard operating system.