Running a Quantum Circuit at the Speed of Data

  • Authors:
  • Nemanja Isailovic;Mark Whitney;Yatish Patel;John Kubiatowicz

  • Affiliations:
  • -;-;-;-

  • Venue:
  • ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
  • Year:
  • 2008

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Abstract

We analyze circuits for kernels from popular quantum computing applications, characterizing the hardware resources necessary to take ancilla preparation off the critical path. The result is a chip entirely dominated by ancilla generation circuits. To address this issue, we introduce optimized ancilla factories and analyze theirstructure and physical layout for ion trap technology. We introduce a new quantum computing architecture with highly concentrated data-only regions surrounded by shared ancilla factories. The results are a reduced dependence on costly teleportation, more efficient distribution of generated ancillae and more than five times speedup over previous proposals.