Testing of analog systems using behavioral models and optimal experimental design techniques
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Nyquist data converter testing and yield analysis using behavioral simulation
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Structural Fault Based Specification Reduction for Testing Analog Circuits
Journal of Electronic Testing: Theory and Applications
7.2 Enhancing Test Effectiveness for Analog Circuits Using Synthesized Measurements
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Test Development Through Defect and Test Escape Level Estimation for Data Converters
Journal of Electronic Testing: Theory and Applications
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A modeling approach to the overly long testing of analog and mixed-signal devices that saves substantially on time and cost is described. The discussion focuses on the particular case of a 13 bit analog-to-digital converter (ADC). The problems that arise in testing ADCs are identified, showing that the success of the test method depends critically on the quality of the model. Two types of models are examined, physical-sensitivity-based models and empirical-learning-based models, and it is noted that the latter are especially attractive for performance-testing applications like the ADC example. An 18-parameter model of the 13 bit ADC was developed using a combination of physical and empirical modeling techniques and was highly successful. With an array process to speed up the computations, the computational overhead can be kept below 1 s per device, so the test time, which is reduced by a factor of 128, becomes negligible