Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Core-Based Scan Architecture for Silicon Debug
ITC '02 Proceedings of the 2002 IEEE International Test Conference
A reconfigurable design-for-debug infrastructure for SoCs
Proceedings of the 43rd annual Design Automation Conference
Transaction-Based Communication-Centric Debug
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
A multi-core debug platform for NoC-based systems
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core
Proceedings of the 46th Annual Design Automation Conference
On signal tracing in post-silicon validation
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
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Cross-trigger, the mechanism to trigger activities in one debug entity from debug events happened in another debug entity, is a very useful technique for debugging applications involving multiple embedded cores. Existing solutions rely on dedicated interconnects (i.e., different from functional interconnects) to transfer debug events and cannot guarantee the arrival time of the debug events coincides with the arrival time of the data messages between multiple cores. This results in mismatches between the observed system internal operations and the ones that designers expect to watch. To tackle the above problem, in this paper, we propose to package the cross-trigger events and the actual data together into transaction messages and transfer them along the same functional interconnects (namely in-band debug event transmission), with the help of novel design-for-debug circuits. Simulation results on a hypothetical NoC-based systems show the effectiveness of the proposed technique.