Improvements for the Symbolic Verification of Timed Automata

Authors:
Rongjie Yan;Guangyuan Li;Wenliang Zhang;Yunquan Peng
Affiliations:
State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences,Beijing,100080, China and Graduate School of the Chinese Academy of Sciences,Beijing,100039, China;State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences,Beijing,100080, China;State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences,Beijing,100080, China and Graduate School of the Chinese Academy of Sciences,Beijing,100039, China;State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences,Beijing,100080, China and Graduate School of the Chinese Academy of Sciences,Beijing,100039, China
Venue:
FORTE '07 Proceedings of the 27th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Year:
2007

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Abstract

Based on the equivalence relation for location based reachability between continuous and integer semantics of closed timed automata, Beyer et al. have implemented the verifier Rabbit, with the uniform representation of reachable configurations. However, the growth of maximal constant of clock variables will decline the performance of Rabbit. The paper proposes an improved symbolic method, using binary decision diagrams (BDDs) to store the symbolic representation of discretized states, for the verification of timed systems. Compared with Rabbit, experiments demonstrate that besides the memory reduction, our implementation is also less sensitive to the size of clock domain.