A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs

Authors:
Francesca Palumbo;Simone Secchi;Danilo Pani;Luigi Raffo
Affiliations:
DIEE - Dept. of Electrical and Electronic Engineering, University of Cagliari, Cagliari, Italy 09123;DIEE - Dept. of Electrical and Electronic Engineering, University of Cagliari, Cagliari, Italy 09123;DIEE - Dept. of Electrical and Electronic Engineering, University of Cagliari, Cagliari, Italy 09123;DIEE - Dept. of Electrical and Electronic Engineering, University of Cagliari, Cagliari, Italy 09123
Venue:
SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
Year:
2008

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Abstract

Multi-Processor Systems-on-Chip (MPSoCs) are the most recent challenge of the VLSI technologies and Networks on Chip represent a high performance alternative to the traditional bus architectures. In this paper, a novel approach to the design of a dual-mode router, based on the idea of supporting both circuit and packet switching in a non-exclusive way, is presented and evaluated. This feature makes the proposed architecture suitable for MPSoCs which have to deal with heterogeneous traffic characteristics especially in terms of data size, such as the Massively Parallel Processors. Non-exclusivity enables packets latency reduction, which in turn implies lower task completion times, and also it increases throughput.