Sequential circuit fault simulation by fault information tracing algorithm: FIT

  • Authors:
  • Yoshihiro Kitamura

  • Affiliations:
  • NTT LSI Laboratories, Atsugi-shi, Kanagawa, 243-01, Japan

  • Venue:
  • DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
  • Year:
  • 1991

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Abstract