Sequential circuit fault simulation by fault information tracing algorithm: FIT
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
The comparative and concurrent simulation of discrete-event experiments
Journal of Electronic Testing: Theory and Applications
HCSM: a framework for behavior and scenario control in virtual environments
ACM Transactions on Modeling and Computer Simulation (TOMACS) - Special issue on graphics, animation, and visualization for simulation environments
Multiple-Fault Simulation and Coverage of Deterministic Single-Fault Test Sets
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
The concurrent simulation of nearly identical digital networks
DAC '73 Proceedings of the 10th Design Automation Workshop
An efficient method of fault simulation for digital circuits modeled from boolean gates and memories
DAC '77 Proceedings of the 14th Design Automation Conference
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Proceedings of the eighteenth workshop on Parallel and distributed simulation
Using RT Level Component Descriptions for Single Stuck-at Hierarchical Fault Simulation
Journal of Electronic Testing: Theory and Applications
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The testability of a class of regular circuits calleddivergent trees is investigated under a functional fault model. Divergent trees include such practical circuits as decoders anddemultiplexers. We prove that uncontrolled divergent trees aretestable ...