CrossCheck: a cell based VLSI testability solution
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
Non-scan design-for-testability techniques for sequential circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
Test Cycle Count Reduction in a Parallel Scan BIST Environment
Journal of Electronic Testing: Theory and Applications - Special Issue on the 7th ASIAN TEST SYMPOSIUM, ATS-98
CrossCheck: An Innovative Testability Solution
IEEE Design & Test
Testing Embedded Cores Using Partial Isolation Rings
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Modifying User-Defined Logic for Test Access to Embedded Cores
ITC '97 Proceedings of the 1997 IEEE International Test Conference
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
| Hi-index | 0.00 |