IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
O2 ABA: a novel high-performance predictable circuit architecture for the deep submicron era
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Analysis and Reduction of Capacitive Coupling Noise in High-Speed VLSI Circuits
ICCD '01 Proceedings of the International Conference on Computer Design: VLSI in Computers & Processors
Wire Swizzling to Reduce Delay Uncertainty Due to Capacitive Coupling
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
Floorplan-Based Crosstalk Estimation for Macrocell-Based Designs
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
A Low-Swing Differential Signaling Scheme for On-Chip Global Interconnects
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
An Accurate Energy and Thermal Model for Global Signal Buses
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
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Crosstalk noise and delay uncertainty are two major problems in modern very large scale integration (VLSI) design. To overcome these difficulties, a new dielectric structure is proposed for integrated circuits, which is in contrast to the conventional Cu/low-K technology. Both structures are simulated employing a field solver and a time domain simulator. Using the new dielectric structure, near- and far-end crosstalk noises are reduced 45.2% and 15% in the test dimensions, respectively. The proposed structure, called gradually low-K, exhibits negligible side-effects in terms of delay and power consumption. Therefore, it is shown that the gradually low-K structure is a relevant choice to overcome the crosstalk and delay uncertainty problems, especially in the global interconnects tier.