Ultra-low power DLMS adaptive filter for hearing aid applications
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits
ISVLSI '02 Proceedings of the IEEE Computer Society Annual Symposium on VLSI
A Multiplierless 2-D Convolver Chip for Real-Time Image Processing
Journal of VLSI Signal Processing Systems
Theoretical and practical limits of dynamic voltage scaling
Proceedings of the 41st annual Design Automation Conference
Analysis and mitigation of variability in subthreshold design
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
DSPs for Energy Harvesting Sensors: Applications and Architectures
IEEE Pervasive Computing
Circuits for energy harvesting sensor signal processing
Proceedings of the 43rd annual Design Automation Conference
Variation-driven device sizing for minimum energy sub-threshold circuits
Proceedings of the 2006 international symposium on Low power electronics and design
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Subthreshold design has been proposed as an effective technique for designing signal processing circuits needed in wireless sensor nodes powered by sources with limited energy. In this paper we propose a subthreshold FIR architecture which brings the benefits of reduced leakage energy, reduced minimum energy point, reduced operating voltage and increased operating frequency when compared with recently reported subthreshold designs. We shall demonstrate this through the design of a 9-tap FIR filter operating at 220mV with operational frequency of 126kHz/sample consuming 168.3nW or 1.33pJoules/sample. Furthermore, the area overhead of the proposed method is less than that of the transverse structure often employed in subthreshold filter designs. For example, a 9-tap filter based on transverse structure has 5× higher area than the filter designed using our proposed method.