Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
The Stanford FLASH multiprocessor
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Formal Automatic Verification of Cache Coherence in Multiprocessors with Relaxed Memory Models
IEEE Transactions on Parallel and Distributed Systems
Well-structured transition systems everywhere!
Theoretical Computer Science
Protocol Verification as a Hardware Design Aid
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Automatic Deductive Verification with Invisible Invariants
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
On the Verification of Broadcast Protocols
LICS '99 Proceedings of the 14th Annual IEEE Symposium on Logic in Computer Science
Race checking by context inference
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
Reducing Verification Complexity of a Multicore Coherence Protocol Using Assume/Guarantee
FMCAD '06 Proceedings of the Formal Methods in Computer Aided Design
Proceedings of the 2007 ACM symposium on Applied computing
Computing Invariants for Parameter Abstraction
MEMOCODE '07 Proceedings of the 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign
Going with the flow: parameterized verification using message flows
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Empirically efficient verification for a class of infinite-state systems
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Environment abstraction for parameterized verification
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
Counterexample guided invariant discovery for parameterized cache coherence verification
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
An industrially effective environment for formal hardware verification
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient methods for formally verifying safety properties of hierarchical cache coherence protocols
Formal Methods in System Design
Invisible invariants and abstract interpretation
SAS'11 Proceedings of the 18th international conference on Static analysis
Parameterized verification of deadlock freedom in symmetric cache coherence protocols
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
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Parameterized model checking refers to any method that extends traditional, finite-state model checking to handle systems with an arbitrary number of processes. One popular approach to this problem uses abstraction and so-called guard strengthening. Here a small number of processes remain intact, while the rest are abstracted away. This initially causes counter-examples, but the user can write non-interference lemmas, which eliminate spurious behavior by the abstracted processes. The technique is sound in that if the user writes a lemma that is not invariant, the proof will never succeed. Though the non-interference lemmas are typically much simpler than writing a full inductive invariant, there is still a non-trivial amount of human insight needed to analysis counter-examples and concoct the lemmas. In our work, we show how the process of inferring appropriate non-interference lemmas can be automated. Our approach is based on a very general theory that simply assumes a Galois connection between the concrete and abstract systems. Effectively, we start with the non-interference conjecture False, and iteratively weaken it until it is provable using the Galois connection. This produces the strongest non-interference lemma provable in the Galois connection. Hence, if the approach fails to prove the property, then no human lemma would help, since it is the strongest possible lemma. We instantiate this theory to a class of symmetric parameterized systems, and show how BDDs can be used to perform all involved computations. We also show how BDD-blow up that can arise when concretizing can be mitigated by using a sound over-approximation. We successfully applied the resulting tool to three parameterized verification benchmarks: the GERMAN protocol with data path, the GERMAN2004 protocol, and the FLASH protocol. To our knowledge, this is the first time automatic parameterized model checking has been done on GERMAN2004.