Power supply signal calibration techniques for improving detection resolution to hardware Trojans
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
MERO: A Statistical Approach for Hardware Trojan Detection
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
MOLES: malicious off-chip leakage enabled by side-channels
Proceedings of the 2009 International Conference on Computer-Aided Design
A Trojan-resistant system-on-chip bus architecture
MILCOM'09 Proceedings of the 28th IEEE conference on Military communications
Detecting Trojans through leakage current analysis using multiple supply pad IDDQS
IEEE Transactions on Information Forensics and Security
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Malevolent Trojan circuits inserted by layout modifications in an IC at untrustworthy fabrication facilities are difficult to detect by traditional post-manufacturing testing. In this paper, we develop a novel low-overhead design methodology that facilitates the detection of inserted Trojan hardware in an IC through logic testing. As a byproduct, it also increases the security of the design by design obfuscation. Application of the proposed design methodology to an 8-bit RISC processor and a JPEG encoder resulted in improvement in Trojan detection probability significantly. It also obfuscated the design with verification mismatch for 90% of the verification points, while incurring moderate area, power and delay overheads.