Defect detection with transient current testing and its potential for deep sub-micron CMOS ICs
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Fault Simulation Model for i{DDT} Testing: An Investigation
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Hardware Results Demonstrating Defect Detection Using Power Supply Signal Measurements
VTS '05 Proceedings of the 23rd IEEE Symposium on VLSI Test
Quiescent-Signal Analysis: A Multiple Supply Pad IDDQ Method
IEEE Design & Test
Trojan Detection using IC Fingerprinting
SP '07 Proceedings of the 2007 IEEE Symposium on Security and Privacy
Towards trojan-free trusted ICs: problem analysis and detection scheme
Proceedings of the conference on Design, automation and test in Europe
Sensitivity analysis to hardware Trojans using power supply transient signals
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
At-speed delay characterization for IC authentication and Trojan Horse detection
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
Detecting malicious inclusions in secure hardware: Challenges and solutions
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
A region based approach for the identification of hardware Trojans
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
On-demand transparency for improving hardware Trojan detectability
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
Hardware Trojan detection using path delay fingerprint
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
MERO: A Statistical Approach for Hardware Trojan Detection
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
Security against hardware Trojan through a novel application of design obfuscation
Proceedings of the 2009 International Conference on Computer-Aided Design
MOLES: malicious off-chip leakage enabled by side-channels
Proceedings of the 2009 International Conference on Computer-Aided Design
Consistency-based characterization for IC Trojan detection
Proceedings of the 2009 International Conference on Computer-Aided Design
Detecting Trojans through leakage current analysis using multiple supply pad IDDQS
IEEE Transactions on Information Forensics and Security
A unified submodular framework for multimodal IC Trojan detection
IH'10 Proceedings of the 12th international conference on Information hiding
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power fingerprinting in SDR integrity assessment for security and regulatory compliance
Analog Integrated Circuits and Signal Processing
Scalable segmentation-based malicious circuitry detection and diagnosis
Proceedings of the International Conference on Computer-Aided Design
Taxonomy for description of cross-domain attacks on CPS
Proceedings of the 2nd ACM international conference on High confidence networked systems
High-sensitivity hardware trojan detection using multimodal characterization
Proceedings of the Conference on Design, Automation and Test in Europe
Scalable hardware trojan diagnosis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Detection of trojans using a combined ring oscillator network and off-chip transient power analysis
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Post-deployment trust evaluation in wireless cryptographic ICs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Hardware trojan design and detection: a practical evaluation
Proceedings of the Workshop on Embedded Systems Security
Hardware Trojans in wireless cryptographic ICs: silicon demonstration & detection method evaluation
Proceedings of the International Conference on Computer-Aided Design
Hardware security: threat models and metrics
Proceedings of the International Conference on Computer-Aided Design
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Chip design and fabrication is becoming increasingly vulnerable to malicious activities and alternations with globalization. An adversary can introduce a Trojan designed to disable and/or destroy a system at some future time (Time Bomb) or the Trojan may serve to leak confidential information covertly to the adversary. This paper proposes a taxonomy for Trojan classification and then describes a statistical approach for detecting hardware Trojans that is based on the analysis of an ICs power supply transient signals. A key component to improving the resolution of power analysis techniques to Trojans is calibrating for process and test environment (PE) variations. The main focus of this research is on the evaluation of four signal calibration techniques, each designed to reduce the adverse impact of PE variations on our statistical Trojan detection method.