IC Diagnosis Using Multiple Supply Pad IDDQs
IEEE Design & Test
Neighbor Current Ratio (NCR): A New Metric for IDDQ Data Analysis
DFT '02 Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
Current signatures [VLSI circuit testing]
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
On the Comparison of IDDQ and IDDQ Testing
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
VARIANCE REDUCTION USING WAFER PATTERNS in IddQ DATA
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Increasing the IDDQ Test Resolution Using Current Prediction
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Improved Wafer-level Spatial Analysis for IDDQ Limit Setting
ITC '01 Proceedings of the 2001 IEEE International Test Conference
IDDQ '97 Proceedings of the 1997 IEEE International Workshop on IDDQ Testing (IDDQ '97)
A Process and Technology-Tolerant IDDQ Method for IC Diagnosis
VTS '01 Proceedings of the 19th IEEE VLSI Test Symposium
Clustering Based Techniques for IDDQ Testing
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Current Ratios: A Self-Scaling Technique for Production IDDQ Testing
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Journal of Electronic Testing: Theory and Applications
Hardware Results Demonstrating Defect Detection Using Power Supply Signal Measurements
VTS '05 Proceedings of the 23rd IEEE Symposium on VLSI Test
Defect detection under Realistic Leakage Models using Multiple IDDQ Measurement
ITC '04 Proceedings of the International Test Conference on International Test Conference
Power supply signal calibration techniques for improving detection resolution to hardware Trojans
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Journal of Electronic Testing: Theory and Applications
Detecting Trojans through leakage current analysis using multiple supply pad IDDQS
IEEE Transactions on Information Forensics and Security
Hi-index | 0.00 |
Increasing leakage current makes single-threshold IDDQ testing ineffective for differentiating defective and defect-free chips. Quiescent-signal analysis is a new detection and diagnosis technique that uses IDDQ measurements at multiple chip supply ports, reducing the leakage component in each measurement and significantly improving detection of subtle defects. The authors apply regression and ellipse analysis to data collected from 12 test chips to evaluate the technique.