IDDQ Test: Sensitivity Analysis of Scaling
Proceedings of the IEEE International Test Conference on Test and Design Validity
Current Signatures: Application
Proceedings of the IEEE International Test Conference
IDDQ Testing in CMOS Digital ASIC's - Putting it All Together
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Current signatures [VLSI circuit testing]
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Clustering Based Identification of Faulty ICs Using IDDQ Tests
IDDQ '98 Proceedings of the IEEE International Workshop on IDDQ Testing
On effective IDDQ Testing of low-voltage CMOS circuits using leakage control techniques
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Studies of the SEMATECH IDDq test data
Journal of Systems Architecture: the EUROMICRO Journal - Defect and fault tolerance in VLSI Systems
Deep Submicron CMOS Current IC Testing: Is There a Future?
IEEE Design & Test
IDDQ Testing for Deep-Submicron ICs: Challenges and Solutions
IEEE Design & Test
IDDQ Test: Will It Survive the DSM Challenge?
IEEE Design & Test
Replacing IDDQ Testing: With Variance Reduction
Journal of Electronic Testing: Theory and Applications
Immediate Neighbor Difference IDDQ Test (INDIT) for Outlier Identification
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
An Empirical Study on the Effects of Test Type Ordering on
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Improving Delta-IDDQ-based test methods
ITC '00 Proceedings of the 2000 IEEE International Test Conference
VARIANCE REDUCTION USING WAFER PATTERNS in IddQ DATA
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Increasing the IDDQ Test Resolution Using Current Prediction
ITC '00 Proceedings of the 2000 IEEE International Test Conference
DECOUPLE: DEFECT CURRENT DETECTION IN DEEP SUBMICRON IDDQ
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Improved Wafer-level Spatial Analysis for IDDQ Limit Setting
ITC '01 Proceedings of the 2001 IEEE International Test Conference
A Practical Built-In Current Sensor for IDDQ Testing
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Journal of Electronic Testing: Theory and Applications
On New Current Signatures and Adaptive Test Technique Combination
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Built-in Current Sensor for "I{DDQ} Testing of Deep Submicron Digital CMOS ICs
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
IDDX-based test methods: A survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Defect Detection Using Quiescent Signal Analysis
Journal of Electronic Testing: Theory and Applications
Quiescent-Signal Analysis: A Multiple Supply Pad IDDQ Method
IEEE Design & Test
Graphical IDDQ signatures reduce defect level and yield loss
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A new technique for evaluating IDDQ data using aclustering based approach is presented. While prevailingIDDQ test techniques rely on a fixed threshold or thecurrent signature of an IC, the proposed technique relieson abnormalities of the IDDQ distribution of a device withrespect to other devices in the test set. Results ofapplying this technique to data collected on a highvolume graphics chip are described. Results are alsocompared to the conventional single threshold approach,and benefits of the new technique are presented.