Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Low-energy embedded FPGA structures
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Digital systems engineering
Low-string on-chip signaling techniques: effectiveness and robustness
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
A Direct Bootstrapped CMOS Large Capacitive-Load Driver Circuit
Proceedings of the conference on Design, automation and test in Europe - Volume 1
High performance level conversion for dual VDD design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Low-Swing Differential Signaling Scheme for On-Chip Global Interconnects
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Bootstrapped full--swing CMOS driver for low supply voltage operation
Proceedings of the conference on Design, automation and test in Europe: Proceedings
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This paper reports a series of symmetric high performance, low to full swing level converters (udld1-converter to udld5-converter) for recovering signal levels at the receiver end of the global interconnects with large capacitive loads. The proposed udld5-converter provides a matching receiver for the up-down low swing voltage driver (UDLD) signaling style for driving the global interconnect lines. When implemented on 0.13 μm CMOS 1.2 V technology, the udld5-converter performs 16% faster, reduces the energy per switching event by 4%, the energy-delay product by 19%, and the active area by 10%, when compared with a counterpart up low swing voltage driver (ULD) level converter (uld-converter). The proposed level converter receivers, each provide a different performance energy saving trade off. The paper also provides comparative performance evaluation of the various proposed level converters and uld-converter.