Combining Model Checking and Testing in a Continuous HW/SW Co-verification Process

  • Authors:

  • Paula Herber;Florian Friedemann;Sabine Glesner

  • Affiliations:

  • Berlin Institute of Technology, Berlin, Germany;Berlin Institute of Technology, Berlin, Germany;Berlin Institute of Technology, Berlin, Germany

  • Venue:
  • TAP '09 Proceedings of the 3rd International Conference on Tests and Proofs
  • Year:
  • 2009

  • A HW/SW co-verification framework for SystemC

    ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems

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Abstract

SystemC is widely used for modeling and simulation in hardware/software co-design. However, the co-verification techniques used for SystemC designs are mostly ad-hoc and non-systematic. In this paper, we present an approach to overcome this problem by a systematic, formally founded quality assurance process. Based on a combination of model checking and conformance testing, we obtain a HW/SW co-verification flow that supports HW/SW co-development throughout the whole design process. In addition, we present a novel test algorithm that generates conformance tests for SystemC designs offline and that can cope with non-deterministic systems. To this end, we use a timed automata model of the SystemC design to compute expected simulation or test results. We have implemented the model checking and conformance testing framework and give experimental results to show the applicability of our approach.