Design of a low power video decompression chip set for portable applications
Journal of VLSI Signal Processing Systems - Special issue on technologies for wireless computing
Power exploration for data dominated video applications
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Formalized methodology for data reuse exploration for low-power hierarchical memory mappings
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Dynamic control of motion estimation search parameters for low complex H.264 video coding
IEEE Transactions on Consumer Electronics
On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture
IEEE Transactions on Circuits and Systems for Video Technology
Rate-constrained coder control and comparison of video coding standards
IEEE Transactions on Circuits and Systems for Video Technology
Memory centric design of an MPEG-4 video encoder
IEEE Transactions on Circuits and Systems for Video Technology
On using hierarchical motion history for motion estimation in H.264/AVC
IEEE Transactions on Circuits and Systems for Video Technology
Fast multiple reference frame motion estimation for H.264/AVC
IEEE Transactions on Circuits and Systems for Video Technology
Analysis and complexity reduction of multiple reference frames motion estimation in H.264/AVC
IEEE Transactions on Circuits and Systems for Video Technology
Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder
IEEE Transactions on Circuits and Systems for Video Technology
IEEE Transactions on Circuits and Systems for Video Technology
Run-time adaptive energy-aware motion and disparity estimation in multiview video coding
Proceedings of the 48th Design Automation Conference
Proceedings of the International Conference on Computer-Aided Design
Adaptive power management of on-chip video memory for multiview video coding
Proceedings of the 49th Annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
AMBER: adaptive energy management for on-chip hybrid video memories
Proceedings of the International Conference on Computer-Aided Design
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In motion estimation for video codec, reducing the amount of external memory access is critical to reduce power consumption and to minimize performance degradation. Previous search area reuse algorithms to reduce the memory access still suffer from coding efficiency degradation in fast motion video. Previously, we proposed a selective search area reuse (SSAR) algorithm to reduce the amount of external memory access with minimal coding efficiency degradation. In this letter, we extend SSAR algorithm to multiple reference frame motion estimation with a method to utilize multiple on-chip memories. Then, we propose a frame-level dynamic search range algorithm based on the SSAR algorithm. Finally, we propose a memory usage switching method to increase the utilization of the limited-size on-chip memory. Experimental results show that the proposed algorithm with a search range of 16 achieves 28.64-56.24% reduction according to the number of on-chip memories in multiple reference frames. In the results of the Foreman video sequence, our algorithm operating with a fixed-size on-chip memory compensated for quality degradation by up to 2.7 dB in the frames of fast camera motion, and reduced the amount of memory access by 22.6% with a peak signal-to-noise ratio gain of 1 dB in the frames of camera shaking.