Multimode embedded compression codec engine for power-aware video coding system

Authors:
Chih-Chi Cheng;Po-Chih Tseng;Liang-Gee Chen
Affiliations:
DSP/IC Design Laboratory, Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan;NovaTek Microelectronics Corporation, Hsinchu, Taiwan;DSP/IC Design Laboratory, Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan
Venue:
IEEE Transactions on Circuits and Systems for Video Technology
Year:
2009

Citing 12
Cited 1

Bus-invert coding for low-power I/O

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low-Cost and Real-Time Super-Resolution over a Video Encoder IP

ISQED '03 Proceedings of the 4th International Symposium on Quality Electronic Design
A Novel Bus Encoding Scheme from Energy and Crosstalk Efficiency Perspective for AMBA Based Generic SoC Systems

VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
CALIC-a context based adaptive lossless image codec

ICASSP '96 Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 04
SPIHT image compression without lists

ICASSP '00 Proceedings of the Acoustics, Speech, and Signal Processing, 2000. on IEEE International Conference - Volume 04
Bus-switch coding for reducing power dissipation in off-chip buses

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Analysis and VLSI architecture for 1-D and 2-D discrete wavelet transform

IEEE Transactions on Signal Processing
An image multiresolution representation for lossless and lossy compression

IEEE Transactions on Image Processing
Line-based, reduced memory, wavelet image compression

IEEE Transactions on Image Processing
A new, fast, and efficient image codec based on set partitioning in hierarchical trees

IEEE Transactions on Circuits and Systems for Video Technology
Efficient, low-complexity image coding with a set-partitioning embedded block coder

IEEE Transactions on Circuits and Systems for Video Technology
124 MSamples/s Pixel-Pipelined Motion-JPEG 2000 Codec Without Tile Memory

IEEE Transactions on Circuits and Systems for Video Technology

The secure wavelet transform

Journal of Real-Time Image Processing

Quantified Score

Hi-index	0.00

Visualization

Abstract

In a typical portable multimedia system, external access, which is usually dominated by block-based video content, induces more than half of total system power. Embedded compression (EC) effectively reduces external access caused by video content by reducing the data size. In this paper, an algorithm and a hardware architecture of a new type EC codec engine with multiple modes are presented. Lossless mode, and lossy modes with rate control modes and quality control modes are all supported by single algorithm. The proposed four-tree pipelining scheme can reduce 83% latency and 67% buffer size between transform and entropy coding. The proposed EC codec engine can save 62%, 66%, and 77% external access at lossless mode, half-size mode, and quarter-size mode and can be used in various system power conditions. With TSMC 0.18 µm IP6M CMOS logic process, the proposed EC codec engine can encode or decode CIF 30 frame per second video data and achieve power saving of more than 109 mW. The EC codec engine itself consumes only 2 mW power.