Bus-switch coding for reducing power dissipation in off-chip buses

  • Authors:
  • Mauro Olivieri;Francesco Pappalardo;Giuseppe Visalli

  • Affiliations:
  • Department of Electronic Engineering, University "La Sapienza," Rome, Italy and STMicroelectronics, Catania, Italy;Department of Electronic Engineering, University "La Sapienza," Rome, Italy and STMicroelectronics, Catania, Italy;Department of Electronic Engineering, University "La Sapienza," Rome, Italy and STMicroelectronics, Catania, Italy

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2004

Quantified Score

Hi-index 0.01

Visualization

Abstract

We present a novel coding scheme for reducing bus power dissipation. The presented approach is well suited to driving off-chip buses, where the line capacitance is a dominant factor. A distinctive feature of the technique is the dynamic reodering of bus line positions, in order to minimize the toggling activity on physical bus wires. The effectiveness of the approach is demonstrated through cycle-accurate simulation of industrial benchmarks in conjunction with post-layout evaluation of speed, power and area overhead.