Low-energy embedded FPGA structures
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Digital systems engineering
Low-string on-chip signaling techniques: effectiveness and robustness
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
A Direct Bootstrapped CMOS Large Capacitive-Load Driver Circuit
Proceedings of the conference on Design, automation and test in Europe - Volume 1
High performance level conversion for dual VDD design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Low-Swing Differential Signaling Scheme for On-Chip Global Interconnects
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Bootstrapped full--swing CMOS driver for low supply voltage operation
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Digital Integrated Circuits
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This paper provides a comparative study of the low-voltage signaling methodologies in terms of delay, energy dissipation, and energy delay product (energyxdelay), and sensitivity technology process variations, and noise. We also present the design of two symmetric low-swing driver-receiver pairs for driving signals on the global interconnect lines. The key advantage of the proposed signaling schemes is that they require only one power supply and threshold voltage, hence significantly reducing the design complexity. The proposed signaling schemes were implemented on 1.0V 0.13@mm CMOS technology, for signal transmission along a wire-length of 10mm. When compared with other counterpart symmetric and asymmetric low-swing signaling schemes, the proposed schemes perform better in terms of delay, energy dissipation and energyxdelay.