Leveraging 3D PCRAM technologies to reduce checkpoint overhead for future exascale systems

  • Authors:
  • Xiangyu Dong;Naveen Muralimanohar;Norm Jouppi;Richard Kaufmann;Yuan Xie

  • Affiliations:
  • Pennsylvania State University;Hewlett-Packard Labs;Hewlett-Packard Labs;Hewlett-Packard Labs;Pennsylvania State University

  • Venue:
  • Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis
  • Year:
  • 2009

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Abstract

The scalability of future massively parallel processing (MPP) systems is challenged by high failure rates. Current hard disk drive (HDD) checkpointing results in overhead of 25% or more at the petascale. With a direct correlation between checkpoint frequencies and node counts, novel techniques that can take more frequent checkpoints with minimum overhead are critical to implement a reliable exascale system. In this work, we leverage the upcoming Phase-Change Random Access Memory (PCRAM) technology and propose a hybrid local/global checkpointing mechanism after a thorough analysis of MPP systems failure rates and failure sources. We propose three variants of PCRAM-based hybrid checkpointing schemes, DIMM+HDD, DIMM+DIMM, and 3D+3D, to reduce the checkpoint overhead and offer a smooth transition from the conventional pure HDD checkpoint to the ideal 3D PCRAM mechanism. The proposed pure 3D PCRAM-based mechanism can ultimately take checkpoints with overhead less than 4% on a projected exascale system.