Enabling architectural innovations using non-volatile memory

  • Authors:
  • Vijaykrishnan Narayanan;Vinay Saripalli;Karthik Swaminathan;Ravindhiran Mukundrajan;Guangyu Sun;Yuan Xie;Suman Datta

  • Affiliations:
  • Pennsylvania State University, University Park, USA;Penn State, University Park, USA;Penn State, University Park, USA;Penn State, University Park, USA;Penn State University, University Park, USA;Penn State, University Park, USA;Penn State, University Park, USA

  • Venue:
  • Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
  • Year:
  • 2011

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Abstract

The emergence of non-volatile memory technologies such as Spin Torque Transfer Magneto-resistive Random Access Memory RAM and Phase Change Memories provide new opportunities for architectural innovations. While the zero off-state leakage, fast read access and high densities of these memories make them attractive options as compared to SRAM, their high write energies and latencies as well as their endurance are a concern. We provide three different architectural techniques that utilize the STT-MRAM characteristics to enable new functionalities. First, we show how exploiting the higher density of STT-MRAM in embedded multi-tasked systems can reduce the context switch overhead. Second, we use the STT-MRAM to create a reliable copy of SRAM structures vulnerable to radiation-induced transient errors to improve reliability. Finally, we show a hybrid cache architecture that uses a mix of emerging TFET technology and STT-MRAM technology. Our results indicate that active leakage is still a concern in STT-MRAM structures.