Determining the Order of Processor Transactions in StaticallyScheduled Multiprocessors
Journal of VLSI Signal Processing Systems
Compile-Time Scheduling of Dynamic Constructs in Dataflow Program Graphs
IEEE Transactions on Computers
ISSS '00 Proceedings of the 13th international symposium on System synthesis
A hardware-software codesign methodology for DSP applications
Readings in hardware/software co-design
Minimizing Buffer Requirements under Rate-Optimal Schedule in Regular Dataflow Networks
Journal of VLSI Signal Processing Systems
A Hardware-Software Codesign Methodology for DSP Applications
IEEE Design & Test
Dynamic Task Scheduling with Precedence Constraints and Communication Delays
PaCT '999 Proceedings of the 5th International Conference on Parallel Computing Technologies
The Processing Graph Method Tool (PGMT)
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Joint Application Mapping/Interconnect Synthesis Techniques for Embedded Chip-Scale Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Manycore performance analysis using timed configuration graphs
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Retiming multi-rate DSP algorithms to meet real-time requirement
Proceedings of the Conference on Design, Automation and Test in Europe
Design and implementation of an ordered memory access architecture
ICASSP'93 Proceedings of the 1993 IEEE international conference on Acoustics, speech, and signal processing: plenary, special, audio, underwater acoustics, VLSI, neural networks - Volume I
Scheduling dynamic dataflow graphs with bounded memory using the token flow model
ICASSP'93 Proceedings of the 1993 IEEE international conference on Acoustics, speech, and signal processing: plenary, special, audio, underwater acoustics, VLSI, neural networks - Volume I
Hi-index | 0.00 |