Fault-tolerant design of the IBM pSeries 690 system using POWER4 processor technology

  • Authors:

  • D. C. Bossen;A. Kitamorn;K. F. Reick;M. S. Floyd

  • Affiliations:

  • IBM Server Group, Austin, Texas;IBM Server Group, Austin, Texas;IBM Server Group, Austin, Texas;IBM Server Group, Austin, Texas

  • Venue:
  • IBM Journal of Research and Development
  • Year:
  • 2002

Quantified Score

Hi-index 0.00

Visualization

Abstract

The POWER4-based p690 systems offer the highest performance of the IBM eServer pSeries™ line of computers. Within the general-purpose UNIX® server market, they also offer the highest levels of concurrent error detection, fault isolation, recovery, and availability. High availability is achieved by minimizing component failure rates through improvements in the base technology, and through design techniques that permit hardand soft-failure detection, recovery, and isolation, repair deferral, and component replacement concurrent with system operation. In this paper, we discuss the faulttolerant design techniques that were used for array, logic, storage, and I/O subsystems for the p690. We also present the diagnostic strategy, fault-isolation, and recovery techniques. New features such as POWER4 synchronous machine-check interrupt, PCI bus error recovery, array dynamic redundancy, and minimum-element dynamic reconfiguration are described. The design process used to verify error detection, fault isolation, and recovery is also described.