A Single-Path Chip-Multiprocessor System

Authors:
Martin Schoeberl;Peter Puschner;Raimund Kirner
Affiliations:
Institute of Computer Engineering, Vienna University of Technology, Austria;Institute of Computer Engineering, Vienna University of Technology, Austria;Institute of Computer Engineering, Vienna University of Technology, Austria
Venue:
SEUS '09 Proceedings of the 7th IFIP WG 10.2 International Workshop on Software Technologies for Embedded and Ubiquitous Systems
Year:
2009

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Abstract

In this paper we explore the combination of a time-predictable chip-multiprocessor system with the single-path programming paradigm. Time-sliced arbitration of the main memory access provides time-predictable memory load and store instructions. Single-path programming avoids control flow dependent timing variations. To keep the execution time of tasks constant, even in the case of shared memory access of several processor cores, the tasks on the cores are synchronized with the time-sliced memory arbitration unit.