Performance analysis of embedded software using implicit path enumeration
LCTES '95 Proceedings of the ACM SIGPLAN 1995 workshop on Languages, compilers, & tools for real-time systems
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
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Real-Time Systems - Special issue on worst-case execution-time analysis
Real-Time Systems: Design Principles for Distributed Embedded Applications
Real-Time Systems: Design Principles for Distributed Embedded Applications
Java Virtual Machine Specification
Java Virtual Machine Specification
Design for Timing Predictability
Real-Time Systems
WCET analysis for a Java processor
JTRES '06 Proceedings of the 4th international workshop on Java technologies for real-time and embedded systems
Computer Architecture, Fourth Edition: A Quantitative Approach
Computer Architecture, Fourth Edition: A Quantitative Approach
High-Performance Embedded Computing: Architectures, Applications, and Methodologies
High-Performance Embedded Computing: Architectures, Applications, and Methodologies
RTSS '07 Proceedings of the 28th IEEE International Real-Time Systems Symposium
Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
The worst-case execution-time problem—overview of methods and survey of tools
ACM Transactions on Embedded Computing Systems (TECS)
A Java processor architecture for embedded real-time systems
Journal of Systems Architecture: the EUROMICRO Journal
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EURASIP Journal on Embedded Systems - FPGA supercomputing platforms, architectures, and techniques for accelerating computationally complex algorithms
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SEUS '09 Proceedings of the 7th IFIP WG 10.2 International Workshop on Software Technologies for Embedded and Ubiquitous Systems
Nonblocking real-time garbage collection
ACM Transactions on Embedded Computing Systems (TECS)
A real-time Java chip-multiprocessor
ACM Transactions on Embedded Computing Systems (TECS)
Run-time power-down strategies for real-time SDRAM memory controllers
Proceedings of the 49th Annual Design Automation Conference
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In this paper, we propose an approach to calculate worst-case execution times (WCET) of tasks running on a homogeneous Java multiprocessor. These processors access a shared main memory. Hence, the tasks running on different CPUs may influence the execution times of each other. Therefore, we implemented a time division multiple access arbiter that divides the memory access time into equal time slots, one time slot for each CPU. This memory arbitration allows calculating upper bounds for the execution time of Java bytecodes depending on the number of CPUs, the size of the time slot, and the memory access time. A WCET analysis tool can utilize these results and generate temporal, upper bounds for application tasks. We further explore how the size of the time slot and the number of CPUs in the system influence the WCET results. Furthermore, a real-world application task is used to compare the analyzed results with measured execution times. This paper describes the timing analysis of a time-predictable Java multiprocessor with shared memory.