Theoretical Computer Science
Model checking
Symbolic model checking with rich assertional languages
Theoretical Computer Science
Model Checking of Safety Properties
Formal Methods in System Design
TACAs '96 Proceedings of the Second International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Efficient Guiding Towards Cost-Optimality in UPPAAL
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Reachability Analysis of Pushdown Automata: Application to Model-Checking
CONCUR '97 Proceedings of the 8th International Conference on Concurrency Theory
On Expressive and Model Checking Power of Propositional Program Logics
PSI '02 Revised Papers from the 4th International Andrei Ershov Memorial Conference on Perspectives of System Informatics: Akademgorodok, Novosibirsk, Russia
Verifying Systems with Infinite but Regular State Spaces
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Efficient Algorithms for Model Checking Pushdown Systems
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Liveness and Acceleration in Parameterized Verification
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
The power of reachability testing for timed automata
Theoretical Computer Science
Efficient reduction of finite state model checking to reachability analysis
International Journal on Software Tools for Technology Transfer (STTT)
Shortest counterexamples for symbolic model checking of LTL with past
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Symbolic systems, explicit properties: on hybrid approaches for LTL symbolic model checking
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Coinductive logic programming and its applications
ICLP'07 Proceedings of the 23rd international conference on Logic programming
Automatic analysis of DMA races using model checking and k-induction
Formal Methods in System Design
Survey: Linear Temporal Logic Symbolic Model Checking
Computer Science Review
| Hi-index | 0.00 |
In previous work we have developed a syntactic reduction of repeated reachability to reachability for finite state systems. This may lead to simpler and more uniform proofs for model checking of liveness properties, help to find shortest counterexamples, and overcome limitations of closed-source model-checking tools. In this paper we show that a similar reduction can be applied to a number of infinite state systems, namely, (@w-)regular model checking, push-down systems, and timed automata.