The existence of refinement mappings
Theoretical Computer Science
Eraser: a dynamic data race detector for multithreaded programs
ACM Transactions on Computer Systems (TOCS)
Type-based race detection for Java
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
Communications of the ACM
SAT-Based Verification without State Space Traversal
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Efficient Computation of Recurrence Diameters
VMCAI 2003 Proceedings of the 4th International Conference on Verification, Model Checking, and Abstract Interpretation
Using induction and BDDs to model check invariants
Proceedings of the IFIP WG 10.5 International Conference on Correct Hardware Design and Verification Methods: Advances in Hardware Design and Verification
Circular Compositional Reasoning about Liveness
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Formal verification of the FPGA cores
Nordic Journal of Computing
RacerX: effective, static detection of race conditions and deadlocks
SOSP '03 Proceedings of the nineteenth ACM symposium on Operating systems principles
Dynamic partial-order reduction for model checking software
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Power Efficient Processor Architecture and The Cell Processor
HPCA '05 Proceedings of the 11th International Symposium on High-Performance Computer Architecture
Effective static race detection for Java
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Compilers: Principles, Techniques, and Tools (2nd Edition)
Compilers: Principles, Techniques, and Tools (2nd Edition)
Sequoia: programming the memory hierarchy
Proceedings of the 2006 ACM/IEEE conference on Supercomputing
CellSs: a programming model for the cell BE architecture
Proceedings of the 2006 ACM/IEEE conference on Supercomputing
Sequoia: programming the memory hierarchy
Proceedings of the 2006 ACM/IEEE conference on Supercomputing
Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-Chip
FMCAD '06 Proceedings of the Formal Methods in Computer Aided Design
Explicit Safety Property Strengthening in SAT-based Induction
VLSID '07 Proceedings of the 20th International Conference on VLSI Design held jointly with 6th International Conference: Embedded Systems
The software model checker Blast: Applications to software engineering
International Journal on Software Tools for Technology Transfer (STTT)
Scaling up the formal verification of Lustre programs with SMT-based techniques
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Compile-Time and Run-Time Issues in an Auto-Parallelisation System for the Cell BE Processor
Euro-Par 2008 Workshops - Parallel Processing
Type-Directed Compilation for Multicore Programming
Electronic Notes in Theoretical Computer Science (ENTCS)
CellFS: Taking the "DMA out of Cell programming
IPDPS '09 Proceedings of the 2009 IEEE International Symposium on Parallel&Distributed Processing
Reducing concurrent analysis under a context bound to sequential analysis
Formal Methods in System Design
Session-Based Compilation Framework for Multicore Programming
Formal Methods for Components and Objects
SAT-based Induction for Temporal Safety Properties
Electronic Notes in Theoretical Computer Science (ENTCS)
Using Satisfiability Modulo Theories for Inductive Verification of Lustre Programs
Electronic Notes in Theoretical Computer Science (ENTCS)
Liveness Checking as Safety Checking for Infinite State Spaces
Electronic Notes in Theoretical Computer Science (ENTCS)
SMT-Based Bounded Model Checking for Embedded ANSI-C Software
ASE '09 Proceedings of the 2009 IEEE/ACM International Conference on Automated Software Engineering
Automatic Offloading of C++ for the Cell BE Processor: A Case Study Using Offload
CISIS '10 Proceedings of the 2010 International Conference on Complex, Intelligent and Software Intensive Systems
SMT-based bounded model checking for multi-threaded software in embedded systems
Proceedings of the 32nd ACM/IEEE International Conference on Software Engineering - Volume 2
Making prophecies with decision predicates
Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
SCRATCH: a tool for automatic analysis of dma races
Proceedings of the 16th ACM symposium on Principles and practice of parallel programming
Automatic safety proofs for asynchronous memory operations
Proceedings of the 16th ACM symposium on Principles and practice of parallel programming
Strengthening induction-based race checking with lightweight static analysis
VMCAI'11 Proceedings of the 12th international conference on Verification, model checking, and abstract interpretation
SATABS: SAT-Based predicate abstraction for ANSI-C
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Offload – automating code migration to heterogeneous multicore systems
HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
Automatic analysis of scratch-pad memory code for heterogeneous multicore processors
TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Software verification using k-induction
SAS'11 Proceedings of the 18th international conference on Static analysis
Making software verification tools really work
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Tightening test coverage metrics: a case study in equivalence checking using k-induction
FMCO'10 Proceedings of the 9th international conference on Formal Methods for Components and Objects
Safe asynchronous multicore memory operations
ASE '11 Proceedings of the 2011 26th IEEE/ACM International Conference on Automated Software Engineering
GPUVerify: a verifier for GPU kernels
Proceedings of the ACM international conference on Object oriented programming systems languages and applications
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Modern multicore processors, such as the Cell Broadband Engine, achieve high performance by equipping accelerator cores with small "scratch-pad" memories. The price for increased performance is higher programming complexity --- the programmer must manually orchestrate data movement using direct memory access (DMA) operations. Programming using asynchronous DMA operations is error-prone, and DMA races can lead to nondeterministic bugs which are hard to reproduce and fix. We present a method for DMA race analysis in C programs. Our method works by automatically instrumenting a program with assertions modeling the semantics of a memory flow controller. The instrumented program can then be analyzed using state-of-the-art software model checkers. We show that bounded model checking is effective for detecting DMA races in buggy programs. To enable automatic verification of the correctness of instrumented programs, we present a new formulation of k-induction geared towards software, as a proof rule operating on loops. Our techniques are implemented as a tool, Scratch, which we apply to a large set of programs supplied with the IBM Cell SDK, in which we discover a previously unknown bug. Our experimental results indicate that our k-induction method performs extremely well on this problem class. To our knowledge, this marks both the first application of k-induction to software verification, and the first example of software model checking in the context of heterogeneous multicore processors.