ACM Transactions on Programming Languages and Systems (TOPLAS)
MOCHA: Modularity in Model Checking
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Verification of an Implementation of Tomasulo's Algorithm by Compositional Model Checking
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Assume-Guarantee Based Compositional Reasoning for Synchronous Timing Diagrams
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
An Overview of Formal Verification for the Time-Triggered Architecture
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Contract-Based Coordination of Hardware Components for the Development of Embedded Software
COORDINATION '09 Proceedings of the 11th International Conference on Coordination Models and Languages
Decision procedures for the temporal verification of concurrent lists
ICFEM'10 Proceedings of the 12th international conference on Formal engineering methods and software engineering
Communications of the ACM
Proving stabilization of biological systems
VMCAI'11 Proceedings of the 12th international conference on Verification, model checking, and abstract interpretation
Verifying deadlock-freedom of communication fabrics
VMCAI'11 Proceedings of the 12th international conference on Verification, model checking, and abstract interpretation
Automatic analysis of DMA races using model checking and k-induction
Formal Methods in System Design
PLPV '12 Proceedings of the sixth workshop on Programming languages meets program verification
A dash of fairness for compositional reasoning
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Parameterized verification of deadlock freedom in symmetric cache coherence protocols
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Automatic analysis of scratch-pad memory code for heterogeneous multicore processors
TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Formal Methods in System Design
Causality for free!: parametricity implies causality for functional reactive programs
PLPV '13 Proceedings of the 7th workshop on Programming languages meets program verification
PLPV '13 Proceedings of the 7th workshop on Programming languages meets program verification
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Compositional proofs about systems of many components often involve apparently circular arguments. That is, correctness of component A must be assumed when verifying component B, and vice versa. The apparent circularity of such arguments can be resolved by induction over time. However, previous methods for such circular compositional proofs apply only to safety properties. This paper presents a method of circular compositional reasoning that applies to liveness properties as well. It is based on a new circular compositional rule implemented in the SMV proof assistant. The method is illustrated using Tomasulo's algorithm for out-of-order instruction execution. An implementation is proved live for arbitrary resources using compositional model checking.