Energy minimization using multiple supply voltages
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
A multiple clocking scheme for low-power RTL design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A low power scheduling scheme with resources operating at multiple voltages
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy Efficient Scheduling for Datapath Synthesis
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
High-level synthesis for low power based on network flow method
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
A framework for energy and transient power reduction during behavioral synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Optimal simultaneous module and multivoltage assignment for low power
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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In this paper, an algorithm named MuVoF is proposed to perform multivoltage multifrequency low-energy high-level synthesis for functionally pipelined datapath under resource and throughput constraints. A datapath is partitioned into a number of pipelined stages such that the clock period can be extended maximally. A multivoltage assignment algorithm then utilizes the extended clock period to reduce energy by lowering the supply voltages of the resources. The results are further refined by four local transformations performed in an iterative process. The experiment results show that MuVoF is capable of exploring the design space effectively and achieves efficient energy reduction.