Scheduling techniques for variable voltage low power designs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Energy priority scheduling for variable voltage processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Battery-Driven Dynamic Power Management
IEEE Design & Test
Power-Driven Challenges in Nanometer Design
IEEE Design & Test
A VLSI array architecture with dynamic frequency clocking
ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
Non-Ideal Battery Properties and Low Power Operation in Wearable Computing
ISWC '99 Proceedings of the 3rd IEEE International Symposium on Wearable Computers
Dual-K Versus Dual-T Technique for Gate Leakage Reduction: A Comparative Perspective
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Multivoltage multifrequency low-energy synthesis for functionally pipelined datapath
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A clock control strategy for peak power and RMS current reduction using path clustering
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Variability-aware architecture level optimization techniques for robust nanoscale chip design
Computers and Electrical Engineering
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In battery driven portable applications, the minimization of energy, average power, peak power, and peak power differential are equally important to improve reliability and efficiency. The peak power and the peak power differential drive the transient characteristics of a CMOS circuit. In this paper, we propose a framework for the simultaneous reduction of energy and transient power during behavioral synthesis. A new metric called "cycle power function" (CPF) is defined which captures the transient power characteristics as an equally weighted sum of the normalized mean cycle power and the normalized mean cycle differential power. Minimizing CPF using multiple supply voltages and dynamic frequency clocking under resource constraints results in the reduction of both energy and transient power. Based on the above, we develop a new datapath scheduling algorithm called CPF-scheduler which attempts at power and energy minimization by minimizing the CPF parameter during the scheduling process. The type and number of functional units available become the set of resource constraints for the scheduler. Experimental results indicate that the proposed scheduler achieves significant reductions in terms of power and energy.