FoCs: Automatic Generation of Simulation Checkers from Formal Specifications
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Proceedings of the 40th annual Design Automation Conference
Fault Detection and Isolation Techniques for Quasi Delay-Insensitive Circuits
DSN '04 Proceedings of the 2004 International Conference on Dependable Systems and Networks
Principles of Asynchronous Circuit Design: A Systems Perspective
Principles of Asynchronous Circuit Design: A Systems Perspective
Design and Analysis of a Robust Carbon Nanotube-Based Asynchronous Primitive Circuit
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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This paper presents an intrinsically veriliable library of Quasi Delay Insensitive asynchronous templates providing an efficient debugging platform for large asynchronous circuits. We proposed using State Transition Graph to determining necessary properties which must be checked For every template of a PreCharged Full Buffer library, we defined PSL properties which are used as monitors verifying correctness of necessary handshaking protocols between templates under simulation. Experimental results show that with a 8% increase in simulation time, all faults in handshaking protocols can be detected.