Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
ACM Transactions on Computer Systems (TOCS)
Mixed-level cosimulation for fine gradual refinement of communication in SoC design
Proceedings of the conference on Design, automation and test in Europe
High-level architectural co-simulation using Esterel and C
Proceedings of the ninth international symposium on Hardware/software codesign
JouleTrack: a web based tool for software energy profiling
Proceedings of the 38th annual Design Automation Conference
Voice over IP performance monitoring
ACM SIGCOMM Computer Communication Review
Voice Quality Evaluation of IP-Based Voice Stream Multiplexing Schemes
LCN '01 Proceedings of the 26th Annual IEEE Conference on Local Computer Networks
A robust header compression technique for wireless Ad hoc networks
ACM SIGMOBILE Mobile Computing and Communications Review
Robust header compression (ROHC) in next-generation network processors
IEEE/ACM Transactions on Networking (TON)
CIT '06 Proceedings of the Sixth IEEE International Conference on Computer and Information Technology
MATLAB based codesign framework for wireless broadband communication DSPs
ICASSP '01 Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference - Volume 02
Performance Optimizations for Deploying VoIP Services in Mesh Networks
IEEE Journal on Selected Areas in Communications
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This paper proposes a profile-based network and hardware co-simulation method to investigate the overall performance and real-timing characteristics of a wireless mesh network (WMN) affected by hardware capabilities, speed and complexity. For the sophisticated algorithms to be assisted by a hardware realization, we adopt the RObust Header Compression (ROHC) and packet aggregation that provide high and reliable data transmission over unstable wireless links, which is proven in the preliminary works. To verify the hardware support needs to get the benefit of the two algorithms, we measure the ROHC processing time from Intel Pentium 4 and RouterBOARD, and identify the deterioration of sensor throughput and successful voice calls under various NS-2 simulation scenarios. The co-simulation method integrates the network level simulator, NS-2 and hardware level simulator, SystemC. In this approach, we first insert the modules of ROHC and packet aggregation algorithms into the network simulator hierarchy, and measure the packet arrival times. Then, the corresponding hardware architecture is designed by SystemC for profiling the hardware delay appeared in encoding and decoding packets. The hardware is suitably designed to reduce the complexity and make a sufficient speedup in the packet processing. Finally, the traced hardware delays are applied into the network level simulator to extract real-timing WMN behaviors changed by the hardware operations in each mesh router.