FPGA-based architecture for the real-time computation of 2-D convolution with large kernel size
Journal of Systems Architecture: the EUROMICRO Journal
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Parallel neighbourhood search on many-core platforms
International Journal of Computational Science and Engineering
Optimization of address-based data sorting unit with external memory support
Proceedings of the 14th International Conference on Computer Systems and Technologies
Real-time video surveillance on an embedded, programmable platform
Microprocessors & Microsystems
Journal of Real-Time Image Processing
Modified stable Euler-number algorithm implementation for real-time image binarization
Journal of Real-Time Image Processing
Hi-index | 14.98 |
A systematic approach to the comparison of the graphics processor (GPU) and reconfigurable logic is defined in terms of three throughput drivers. The approach is applied to five case study algorithms, characterized by their arithmetic complexity, memory access requirements, and data dependence, and two target devices: the nVidia GeForce 7900 GTX GPU and a Xilinx Virtex-4 field programmable gate array (FPGA). Two orders of magnitude speedup, over a general-purpose processor, is observed for each device for arithmetic intensive algorithms. An FPGA is superior, over a GPU, for algorithms requiring large numbers of regular memory accesses, while the GPU is superior for algorithms with variable data reuse. In the presence of data dependence, the implementation of a customized data path in an FPGA exceeds GPU performance by up to eight times. The trends of the analysis to newer and future technologies are analyzed.