Real-time video surveillance on an embedded, programmable platform

Authors:
Hau T. Ngo;Robert W. Ives;Ryan N. Rakvic;Randy P. Broussard
Affiliations:
Electrical and Computer Engineering Department, US Naval Academy, Annapolis, MD 21402, United States;Electrical and Computer Engineering Department, US Naval Academy, Annapolis, MD 21402, United States;Electrical and Computer Engineering Department, US Naval Academy, Annapolis, MD 21402, United States;Weapons and Systems Engineering Department, US Naval Academy, Annapolis, MD 21402, United States
Venue:
Microprocessors & Microsystems
Year:
2013

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Abstract

In this work, a hardware-software co-design is proposed to effectively utilize FPGA resources for a prototype of an automated video surveillance system on a programmable platform. Time-critical steps of a foreground object detection algorithm are designed and implemented in the FPGA's logic elements to maximize parallel processing. Other non time-critical tasks are achieved by executing a high level language program on an embedded Nios-II processor. Custom and parallel processing modules are integrated into the video processing chain by a streaming protocol that aggressively utilizes on-chip memory to increase the throughput of the system. A data forwarding technique is incorporated with an on-chip buffering scheme to reduce computations and resources in the window-based operations. Other data control interfaces are achieved by software drivers that communicate with hardware controllers using Altera's Memory-Mapped protocol. The proposed prototype has demonstrated real-time processing capability that outperforms other implementations.