True Random Number Generator Embedded in Reconfigurable Hardware
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
A Hardware Random Number Generator
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Evaluation Criteria for True (Physical) Random Number Generators Used in Cryptographic Applications
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
A Design of Reliable True Random Number Generator for Cryptographic Applications
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
A Provably Secure True Random Number Generator with Built-In Tolerance to Active Attacks
IEEE Transactions on Computers
The bit extraction problem or t-resilient functions
SFCS '85 Proceedings of the 26th Annual Symposium on Foundations of Computer Science
IEEE Transactions on Signal Processing
The Frequency Injection Attack on Ring-Oscillator-Based True Random Number Generators
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
Comparison of self-timed ring and inverter ring oscillators as entropy sources in FPGAs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Fault Analysis and Evaluation of a True Random Number Generator Embedded in a Processor
Journal of Electronic Testing: Theory and Applications
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A ring oscillator-based true-random number generator design (Rings design) was introduced in Sunar et al. [2007]. The design was rigorously analyzed under a simple mathematical model and its performance characteristics were established. In this article we focus on the practical aspects of the Rings design on a reconfigurable logic platform and determine their implications on the earlier analysis framework. We make recommendations for avoiding pitfalls in real-life implementations by considering ring interaction, transistor-level effects, narrow signal rejection, transmission line attenuation, and sampler bias. Furthermore, we present experimental results showing that changing operating conditions such as the power supply voltage or the operating temperature may affect the output quality when the signal is subsampled. Hence, an attacker may shift the operating point via a simple noninvasive influence and easily bias the TRNG output. Finally, we propose modifications to the design which significantly improve its robustness against attacks, alleviate implementation-related problems, and simultaneously improve its area, throughput, and power performance.