A General Approach for Generating Natural Random Variables
IEEE Transactions on Computers
Efficient Online Tests for True Random Number Generators
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Evaluation Criteria for True (Physical) Random Number Generators Used in Cryptographic Applications
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
IEEE Transactions on Computers
A Provably Secure True Random Number Generator with Built-In Tolerance to Active Attacks
IEEE Transactions on Computers
A Design for a Physical RNG with Robust Entropy Estimators
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
Improving the Robustness of Ring Oscillator TRNGs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
CAIP'07 Proceedings of the 12th international conference on Computer analysis of images and patterns
MILCOM'09 Proceedings of the 28th IEEE conference on Military communications
ISCIS'05 Proceedings of the 20th international conference on Computer and Information Sciences
Design of testable random bit generators
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
A hardware-implemented truly random key generator for secure biometric authentication systems
MRCS'06 Proceedings of the 2006 international conference on Multimedia Content Representation, Classification and Security
On the quality and quantity of random decisions in stochastic local search for SAT
AI'06 Proceedings of the 19th international conference on Advances in Artificial Intelligence: Canadian Society for Computational Studies of Intelligence
Designing a side channel resistant random number generator
CARDIS'10 Proceedings of the 9th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Application
| Hi-index | 0.02 |
The scheme of a device that should have a simple and reliable implementation and that, under simply verifiable conditions, should generate a true random binary sequence is defined. Some tricks are used to suppress bias and correlation so that the desired statistical properties are obtained without using any pseudorandom transformation. The proposed scheme is well represented by an analytic model that describes the system behaviour both under normal conditions and when different failures occur. Within the model, it is shown that the system is robust to changes in the circuit parameters. Furthermore, a test procedure can be defined to verify the correct operation of the generator without performing any statistical analysis of its output.