Verification of large synthesized designs
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IEEE Transactions on Computers
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MTV '06 Proceedings of the Seventh International Workshop on Microprocessor Test and Verification
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
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Exploiting structure in an AIG based QBF solver
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SAT'10 Proceedings of the 13th international conference on Theory and Applications of Satisfiability Testing
Parallel QBF Solving with Advanced Knowledge Sharing
Fundamenta Informaticae - RCRA 2009 Experimental Evaluation of Algorithms for Solving Problems with Combinatorial Explosion
Verification of partial designs using incremental QBF solving
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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We discuss how to combine 01X-logic and quantified boolean formulas (QBF) within a homogeneous SAT/QBF-framework in the context of bounded model checking of blackbox designs. The proposed combination allows a flexible handling of blackboxes w.r.t. computational resources. Preliminary results show the scalability of the approach.