Algorithm and hardware complexity reduction techniques for k-best sphere decoders

  • Authors:
  • Nariman Moezzi-Madani;Thorlindur Thorolfsson;William Rhett Davis

  • Affiliations:
  • North Carolina State University, Raleigh, NC, USA;North Carolina State University, Raleigh, NC, USA;North Carolina State University, Raleigh, NC, USA

  • Venue:
  • Proceedings of the 20th symposium on Great lakes symposium on VLSI
  • Year:
  • 2010

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Abstract

MIMO (Multi-Input Multi-Output) technology is garnering more interest in new wireless communication standards. In this work, we introduce three techniques to reduce the power consumption of MIMO detectors and increase their data rate. We decrease the complexity of the K-best sphere decoder effectively by using the MMSE-SQRD channel processing technique. This technique results in a smaller K which results in a great reduction in power consumption compared to the K-best detectors using ZF-SQRD with the same BER/throughput performance. We also propose a child reduction technique that reduces the number of multiplications and additions which results in 8% power reduction. Also, we utilized the odd-even merge algorithm for the merge unit which is on the critical path of the circuit, to achieve the best power/throughput tradeoff. We implemented a 4*4 16QAM detector in a commercial 0.18µm CMOS process; synthesis results show that the detector works at the maximum data rate of 768Mbps with the area of 91KGates.