Studying compiler optimizations on superscalar processors through interval analysis

Authors:
Stijn Eyerman;Lieven Eeckhout;James E. Smith
Affiliations:
ELIS Department, Ghent University, Belgium;ELIS Department, Ghent University, Belgium;ECE Department, University of Wisconsin - Madison
Venue:
HiPEAC'08 Proceedings of the 3rd international conference on High performance embedded architectures and compilers
Year:
2008

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Abstract

Understanding the performance impact of compiler optimizations on superscalar processors is complicated because compiler optimizations interact with the microarchitecture in complex ways. This paper analyzes this interaction using interval analysis, an analytical processor model that allows for breaking total execution time into cycle components. By studying the impact of compiler optimizations on the various cycle components, one can gain insight into how compiler optimizations affect out-of-order processor performance. The analysis provided in this paper reveals various interesting insights and suggestions for future work on compiler optimizations for out-of-order processors. In addition, we contrast the effect compiler optimizations have on out-of-order versus in-order processors.