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IRE-AIEE-ACM '59 (Eastern) Papers presented at the December 1-3, 1959, eastern joint IRE-AIEE-ACM computer conference
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IRE-AIEE-ACM '59 (Eastern) Papers presented at the December 1-3, 1959, eastern joint IRE-AIEE-ACM computer conference
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IRE-AIEE-ACM '60 (Eastern) Papers presented at the December 13-15, 1960, eastern joint IRE-AIEE-ACM computer conference
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IEEE Transactions on Computers
The Expression Processor: A Pipelined, Multiple- Processor Architecture
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Percolation of Code to Enhance Parallel Dispatching and Execution
IEEE Transactions on Computers
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AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
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ACM Transactions on Computer Systems (TOCS)
Representation of Concurrency with Ordering Matrices
IEEE Transactions on Computers
Studying compiler optimizations on superscalar processors through interval analysis
HiPEAC'08 Proceedings of the 3rd international conference on High performance embedded architectures and compilers
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ACM Transactions on Architecture and Code Optimization (TACO)
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This note reports the results of an examination of seven programs originally written for execution on a conventional computer (CDC-3600). We postulate an infinite machine, one with an infinite memory and instruction stack, infinite registers and memory, and an infinite number of functional units. This machine wiU exectite a program in parallel at maximum speed by executing each instruction at the earliest possible moment.