Principles in the Evolutionary Design of Digital Circuits—Part I
Genetic Programming and Evolvable Machines
ICES '01 Proceedings of the 4th International Conference on Evolvable Systems: From Biology to Hardware
Proceedings of the European Conference on Genetic Programming
Evolvable Hardware Solutions For Extreme Temperature Electronics
EH '01 Proceedings of the The 3rd NASA/DoD Workshop on Evolvable Hardware
Providing information from the environment for growing electronic circuits through polymorphic gates
GECCO '05 Proceedings of the 7th annual workshop on Genetic and evolutionary computation
Temperature-Adaptive Circuits on Reconfigurable Analog Arrays
AHS '06 Proceedings of the first NASA/ESA conference on Adaptive Hardware and Systems
Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage
AHS '06 Proceedings of the first NASA/ESA conference on Adaptive Hardware and Systems
Evolutionary design of gate-level polymorphic digital circuits
EC'05 Proceedings of the 3rd European conference on Applications of Evolutionary Computing
On the completeness of the polymorphic gate set
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A SAT-based fitness function for evolutionary optimization of polymorphic circuits
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Polymorphic circuit is a kind of multifunctional circuits that can perform two or more functions under different conditions. And those functions can be activated by changing control parameters, such as temperature, power supply voltage, illumination and so on. Polymorphic circuit provides a novel approach to build multifunctional circuits, and it can be used in many fields. However, polymorphic circuit can not be designed with conventional methods and is hard to be evolved with evolutionary algorithms directly. A novel evolutionary algorithm based on the weighted sum method is proposed in this paper, which can be used to evolve polymorphic circuits at gate level. The experimental results demonstrate that this algorithm can increase the success ratio and decrease the evolutionary generations needed to evolve a polymorphic circuit.