Evolutionary design of gate-level polymorphic digital circuits

  • Authors:
  • Lukáš Sekanina

  • Affiliations:
  • Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic

  • Venue:
  • EC'05 Proceedings of the 3rd European conference on Applications of Evolutionary Computing
  • Year:
  • 2005

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Abstract

A method for the evolutionary design of polymorphic digital combinational circuits is proposed. These circuits are able to perform different functions (e.g. to switch between the adder and multiplier) only as a consequence of the change of a sensitive variable, which can be a power supply voltage, temperature etc. However, multiplexing of standard solutions is not utilized. The evolved circuits exhibit a unique structure composed of multifunctional polymorphic gates considered as building blocks instead. In many cases the area-efficient solutions were discovered for typical tasks of the digital design. We demonstrated that it is useful to combine polymorphic gates and conventional gates in order to obtain the required functionality.