The turn model for adaptive routing
Journal of the ACM (JACM)
The Odd-Even Turn Model for Adaptive Routing
IEEE Transactions on Parallel and Distributed Systems
On the Design of a Photonic Network-on-Chip
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
NoC-Based FPGA: Architecture and Routing
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
Photonic NoC for DMA Communications in Chip Multiprocessors
HOTI '07 Proceedings of the 15th Annual IEEE Symposium on High-Performance Interconnects
Link-load balance aware mapping and routing for NoC
WSEAS Transactions on Circuits and Systems
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The paper presents a novel energy efficient routing scheme for photonic network on chip (PNoC) based on the micro-resonator which takes the insertion loss and the path-setup latency into consideration in order to design a high performance per watt multi-processors. The path-setup latency is a major contributor to the whole system's latency that has something to do with queuing. And insertion loss which has impact on power consumption is closely related to the number of micro-resonators in on state. To solve the multi-objective optimization problem, we design a straight line first heuristic routing scheme. The goal of this routing scheme is to reduce the path-setup latency and insertion loss. Simulation results show that this scheme can low the latency with lower the insertion loss as little as possible.