A compiler approach to fast hardware design space exploration in FPGA-based systems
PLDI '02 Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation
Using estimates from behavioral synthesis tools in compiler-directed design space exploration
Proceedings of the 40th annual Design Automation Conference
CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems
ASAP '04 Proceedings of the Application-Specific Systems, Architectures and Processors, 15th IEEE International Conference
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Design space exploration of real-time multi-media MPSoCs with heterogeneous scheduling policies
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models
Proceedings of the 45th annual Design Automation Conference
Supervised design space exploration by compositional approximation of Pareto sets
Proceedings of the 48th Design Automation Conference
Divide and conquer high-level synthesis design space exploration
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
Efficient design space exploration for component-based system design
Proceedings of the International Conference on Computer-Aided Design
Proceedings of the Conference on Design, Automation and Test in Europe
Compositional system-level design exploration with planning of high-level synthesis
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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This paper presents a clustering method called clustering design space exploration (CDS-ExpA) to accelerate the architectural exploration of behavioral descriptions in C and SystemC. The trade-offs between faster exploration versus optimality of results are investigated. Two variations of CDS-ExpA were developed: CDS-ExpA(min) and CDS-ExpA(max). CDS-ExpA(min) builds the smallest possible clusters while CDS-ExpA(max) builds the largest possible ones, reducing further the design space. Results show that CDS-ExpA(min) and CDS-ExpA(max) explore the design space 90% and 92% faster on average than a previously developed annealer-based exploration, method, at the expense of not finding 36% and 47% of the Pareto optimal designs and finding the smallest design that is 7% and 9% on average, larger, and the fastest design 28% and 32% slower, respectively.