Logic testing and design for testability
Logic testing and design for testability
Testability Conditions for Bilateral Arrays of Combinational Cells
IEEE Transactions on Computers
VLSI array processors
On Functional Testing of Array Processors
IEEE Transactions on Computers
Easily Testable Iterative Logic Arrays
IEEE Transactions on Computers
Test Generation for Iterative Logic Arrays Based on an N-Cube of Cell States Model
IEEE Transactions on Computers
SCOAP: Sandia controllability/observability analysis program
DAC '80 Proceedings of the 17th Design Automation Conference
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