TETA: transistor-level engine for timing analysis
DAC '98 Proceedings of the 35th annual Design Automation Conference
An Asynchronous Parallel Supernodal Algorithm for Sparse Gaussian Elimination
SIAM Journal on Matrix Analysis and Applications
Iterative solution of nonlinear equations in several variables
Iterative solution of nonlinear equations in several variables
Parallelizing CAD: a timely research agenda for EDA
Proceedings of the 45th annual Design Automation Conference
Proceedings of the 45th annual Design Automation Conference
MAPS: multi-algorithm parallel circuit simulation
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Multicore parallel min-cost flow algorithm for CAD applications
Proceedings of the 46th Annual Design Automation Conference
On-the-fly runtime adaptation for efficient execution of parallel multi-algorithm circuit simulation
Proceedings of the International Conference on Computer-Aided Design
Heap slicing using type systems
ICCSA'12 Proceedings of the 12th international conference on Computational Science and Its Applications - Volume Part III
| Hi-index | 0.00 |
With the increasing popularity of multi-core processors and the promise of future many-core systems, parallel CAD algorithm development has attracted a significant amount of research effort. However, a highly relevant issue, parallel program performance modeling has received little attention in the EDA community. Performance modeling serves the critical role of guiding parallel algorithm design and provides a basis for runtime performance optimization. We propose a systematic composable approach for the performance modeling of a recently developed hierarchical multi-algorithm parallel circuit simulation (HMAPS) approach. The unique integration of inter- and intra-algorithm parallelisms allows a multiplicity of parallelisms to be exploited in HMAPS and also creates interesting modeling challenges in forms of complex performance tradeoffs and large runtime configuration space. We model the performances of key subtask entities as functions of workload and parallelism. We address significant complications introduced by inter-algorithm interactions in terms of memory contention and collaborative simulation behavior via novel penalty and statistical based modeling. The proposed approach is able to accurately predict the parallel performance of a given HMAPS configuration and hence enables the runtime optimization of the parallel simulation code.