Combined magnetic- and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM

Authors:
Yiran Chen;Hai Li;Xiaobin Wang;Wenzhong Zhu;Wei Xu;Tong Zhang
Affiliations:
Seagate Technology, Bloomington, NY, USA;Polytechnic Institute of New York University, Brooklyn, NY, USA;Seagate Technology, Bloomington, MN, USA;Seagate Technology, Bloomington, MN, USA;Rensselaer Polytechnic Institute, Troy, NY, USA;Rensselaer Polytechnic Institute, Troy, NY, USA
Venue:
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Year:
2010

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Abstract

A nondestructive self-reference read scheme (NSRS) was recently proposed to overcome the bit-to-bit variation in Spin-Transfer Torque Random Access Memory (STT-RAM). In this work, we introduced three magnetic- and circuit-level techniques, including 1) R-I curve skewing, 2) yield-driven sensing current selection, and 3) ratio matching to improve the sense margin and robustness of NSRS. The measurements of our 16Kb STT-RAM test chip show that compared to the original NSRS design, our proposed technologies successfully increased the sense margin by 2.5X with minimized impacts on the memory reliability and hardware cost.